The scaling of semiconductor devices into the sub 0.5 micron (um) geometry regime is forcing many semiconductor device manufacturers to incorporate alternative processing technologies into the fabrication of semiconductor devices. Refilled trench structures are an example of such a processing technology. The advent of trench-fill technology is gaining wider acceptance as improvements continue in the area of chemical mechanical planarization (CMP) processing. Trench technology is being used in several VLSI and ULSI applications. Among them include the replacement of currently used isolation technologies, such as local oxidation of silicon (LOCOS), the formation of trench interconnect structures, and the formation of trench capacitor structures.
Typically, a trench-filled structure is formed by first forming a trench opening within a semiconductor device substrate. A dielectric or conductive fill material is then deposited to fill the trench opening, and a CMP process removes excess portions of the fill material, thereby forming the trench-filled structure. Depending on the fill material composition and the CMP process used, the time to remove the fill material can be considerable. This situation is further complicated as the depth of the trench opening and the thickness of trench-fill material are increased to accommodate a variety of processing and design considerations. In addition, non-uniformity of the substrate surface after depositing the fill material can impact the final planarity of the surface of the substrate. This is because polishing processes are generally limited in their ability to substantially planarize highly undulated surfaces.
One prior art method of reducing the substrate surface's non-uniformity includes first lithographically patterning the substrate and then using an etch process to remove an entire thickness of the trench-fill material at selected locations before polishing the trench-fill material to form the trench isolation feature. The exposed areas of the patterned surface generally correspond to regions of the substrate surface having thicker amounts of fill material. This method can effectively remove portions of the fill material, however, exposing and developing the substrate requires the additional lithographic processing steps. This additional processing is undesirable because it is time consuming, expensive, and further complicates the manufacturing process.